Broadcom's Tomahawk Ultra switch is designed for high-performance computing and AI, achieving 250ns latency with 51.2 Tbps throughput. The switch eliminates packet loss using Link Layer Retry (LLR) and Credit-Based Flow Control (CBFC). LLR detects errors and retransmits packets, while CBFC prevents buffer overflows, creating a lossless environment. Ethernet header overhead is reduced from 46 to 10 bytes, improving network efficiency. The chip processes up to 77 billion packets per second and can perform complex collective operations without burdening compute resources. SUE-Lite is introduced for power-sensitive applications, allowing more flexible architecture configurations.
The new Tomahawk Ultra switch features a 250ns latency at 51.2 Tbps throughput, achieving a lossless Ethernet fabric through LLR and CBFC mechanisms.
The Tomahawk Ultra chip reduces Ethernet header overhead from 46 to 10 bytes, enhancing network efficiency and allowing for customizable headers based on application needs.
This chip processes up to 77 billion packets per second, proving Ethernet's capability in high-performance environments previously dominated by traditional interconnects.
The SUE-Lite specification offers a lightweight version of the full SUE design, tailored for power- and area-sensitive accelerator applications.
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