Xen to RISC-V port progresses with foundational efforts
Briefly

One of the most notable advancements has been the integration of several patch series into Xen's staging branch (which is already a great success by itself, knowing the code quality level in Xen). These patches primarily focus on leveraging Xen's common codebase to reduce redundant architecture-specific code. This move streamlines development and helps to future-proof the codebase for multi-architecture compatibility.
The primary task is defining BUG_INSN, which enables the proper handling of these macros and related sections in the linker file (lds.S). This simplification reduces the need for complex, architecture-specific implementations.
To build a fully functioning Xen environment on RISC-V, several architecture-specific header files have been introduced. Some of those headers are placeholders needed to satisfy common code dependencies during the build process. Others add code that's needed to make Xen work on RISC-V.
Some other features are already in development - among them interrupt handling, device tree mapping to help the hypervisor manage hardware, page table handling to manage memory, and extensions to handle inter-processor communication.
Read at Theregister
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