AMD's edgiest Epycs get a Zen 5 boost with 84-core Sorano

"Sorano will be available with up to 84 Zen 5 cores - up from 64 on Siena - in a power envelope of just 225 watts. AMD isn't ready to spill all the beans on its latest Epyc just yet, but based on core count alone, we surmise the chip will either feature six density-optimized Zen 5c chiplets with 14 of 16 cores enabled or 12 of the frequency-optimized Zen 5 variety with one of the eight cores fused off."

"Much like its predecessor, Sorano is designed for telco and edge applications like virtual radio access network (vRAN). RAN has traditionally relied on boutique hardware from the likes of Samsung, Nokia, and Ericsson, but with the rise of 5G, they've increasingly been virtualized so they can run on conventional server kit."

"Sorano also introduces optimizations for low-density parity check (LDPC) decoding operations, which aim to reduce latency and speed up forward error correction in 5G networks. As AMD explains it: by handling LDPC decoding more efficiently, the chips are able to free compute resources for additional Layer 1 and Layer 2 processing, helping operators."

AMD has announced the Sorano Epyc 8005-series processors, representing a Zen 5 refresh of the aging Siena lineup. These chips offer up to 84 cores, a significant increase from Siena's 64 cores, while maintaining a 225-watt power envelope. Key improvements include a full 512-bit data path for vector instructions and enhanced micro-architectural efficiency. Sorano targets telco and edge applications, particularly virtual radio access networks (vRAN) for 5G infrastructure. The processors feature optimizations for low-density parity check (LDPC) decoding to reduce latency and improve forward error correction. Designed for wider temperature ranges required by NEBS-compliant telecom systems, Sorano enables operators to allocate more compute resources to higher-layer network processing.

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