Huawei's chip law looks less like Moore and more like marketing

Huawei presented semiconductor advances at ISCAS 2026 in Shanghai, including “Tau Scaling Law” as a successor to Moore’s Law. The principle shifts guidance from geometric scaling to time scaling for electronic system evolution. At the device level, time scaling is tied to signal propagation time and interconnect RC parasitics, pipeline length, and circuit depth. The approach centers on optimizing transistor resistance and parasitic capacitance in interconnects to reduce signal delays, a focus shared across chip companies. Huawei also described “LogicFolding,” a double-layer transistor stacking concept intended for its Kirin 2026 system-on-chip. Similar ideas have been studied by Intel and TSMC, and at least one expert questioned whether the claims represent a true breakthrough.

"Huawei is touting a semiconductor advance - including something it calls the "Tau Scaling Law" as a successor to Moore's Law - but at least one chip expert says the news is more branding than breakthrough."

"He said Moore's Law has seen diminishing returns, and instead presented the Tau Scaling Law as "a new principle for guiding the future development of the semiconductor industry." Tau Scaling, according to He, is about "a shift from geometric to time scaling as the new guiding principle for electronic system evolution.""

"She said that, at the device level, this is about signal propagation time, which is linked to interconnect RC (resistance and capacitance) parasitics, pipeline length, and circuit depth. In other words, it is about optimizing the resistance and parasitic capacitance of transistors and interconnects to cut signal delays, which every chip company puts a lot of effort into anyway."

"As an example of how Tau Scaling works, He said LogicFolding is one solution Huawei has devised - set to feature in its Kirin 2026 system-on-chip, the latest version of its silicon for smartphones, later this year. "It is built on a brand-new free logic design concept, expanding from a single-layer to a double-layer architecture," He said, meaning that it stacks transistors into two layers."

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