
"The ongoing DRAM shortage has created a perfect storm for the proliferation of the appliances, which not only allow for memory to be pooled, but also data stored in that memory to be shared by multiple machines simultaneously. In effect, memory becomes a fungible resource. More importantly, your next round of servers will probably support the tech, if they don't already."
"CXL defines a common, cache-coherent interface for connecting CPUs, memory, accelerators, and other peripherals. The technology comes in a couple of different flavors: CXL.mem, CXL.cache, and CXL.io, which, as a whole, have implications for disaggregated compute. Imagine a rack with a CPU node, GPU node, memory node, and storage node, which can talk to one another completely independently. That's the core idea behind CXL."
"CXL piggybacks off the PCIe standard, which means in theory it should be broadly compatible, but, up to this point, it's primarily been used with memory devices. The 1.0 spec opened the door to memory expansion modules, which allow you to add more memory by slotting them into a CXL-compatible PCIe slot. To the operating system - assuming you're running Linux that is - the extra memory is largely transparent, showing up as if it were attached to another CPU socket, just one without any additional compute."
"The 2.0 spec, which showed up in 2020, added basic support for switching, which meant memory could be pooled"
Modern datacenters allow storage to be local, network-accessed, or shared across systems. Next-generation servers will similarly treat memory as partly local DDR5 and partly remotely accessed from memory godboxes. DRAM shortages drive adoption of appliances that pool memory and allow data in that memory to be shared by multiple machines simultaneously, making memory fungible. New server generations are likely to support the required technology. Compute Express Link (CXL) provides a cache-coherent interface connecting CPUs, memory, accelerators, and peripherals. CXL comes in CXL.mem, CXL.cache, and CXL.io forms, supporting disaggregated compute across independent nodes. CXL builds on PCIe, enabling compatibility, and its 1.0 and 2.0 specifications add memory expansion and basic switching for pooling.
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