The world's tallest chip defies the limits of computing: goodbye to Moore's Law?
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The world's tallest chip defies the limits of computing: goodbye to Moore's Law?
"A scientific team has managed to stack 41 layers of semiconductors, multiplying the density of the circuits by six, without needing to make them any smaller A chip designed to bypass Moore's law.Mo_Manabri (KAUST) For decades, the progress of electronics has followed a simple rule: smaller is better. Since the 1960s, each new generation of chips has packed more transistors into less space, fulfilling the famous Moore's Law."
"Xiaohang Li, a researcher at King Abdullah University of Science and Technology (KAUST) in Saudi Arabia, and his team have designed a chip with 41 vertical layers of semiconductors and insulating materials, approximately ten times higher than any previously manufactured chip. The work, recently published in the journal Nature Electronics, not only represents a technical milestone but also opens the door to a new generation of flexible, efficient, and sustainable electronic devices."
"Having six or more layers of transistors stacked vertically allows us to increase circuit density without making the devices smaller laterally, Li explains. With six layers, we can integrate 600% more logic functions in the same area than with a single layer, achieving higher performance and lower power consumption. Moore's Law began to lose its validity around 2010, when chip manufacturers encountered the laws of physics."
Researchers designed a chip with 41 vertical layers of semiconductors and insulators, roughly ten times higher than previous chips. Stacking six or more transistor layers allows integrating 600% more logic functions in the same area compared to a single layer, increasing performance and reducing power consumption. The vertical-stacking approach bypasses the physical and quantum limits that stalled traditional lateral scaling, offering a route past Moore's Law. The multilayer architecture promises a new generation of flexible, efficient, and more sustainable electronic devices by increasing circuit density without reducing lateral feature sizes.
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